移位寄存器设计实验 74LS198
实验原理
实验步骤
实验代码
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| `timescale 1ns / 1ps module reg_74LS198(CR_, CP, S1, S2, SR, SL, D, Q); input CR_, CP, S1, S2, SR, SL; input [7:0]D;
output reg[7:0]Q;
always @(posedge CP or negedge CR_) begin if(!CR_) Q <= 8'b0000_0000; else begin case({S1, S2}) 2'b00: Q <= Q; 2'b01: Q <= {SR, Q[7:1]}; 2'b10: Q <= {Q[6:0], SL}; 2'b11: Q <= D; endcase end end endmodule
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板极验证
使用的板卡型号:xc7a100tlcsg324-2L
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| set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets CR_] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN V5} [get_ports CR_]
set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets CP] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN U17} [get_ports CP]
set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN T4} [get_ports S1] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN V6} [get_ports S2] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN T5} [get_ports SR] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN T6} [get_ports SL]
set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN R11} [get_ports {D[7]}] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN U12} [get_ports {D[6]}] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN T13} [get_ports {D[5]}] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN V14} [get_ports {D[4]}] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN T14} [get_ports {D[3]}] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN V15} [get_ports {D[2]}] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN R15} [get_ports {D[1]}] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN U16} [get_ports {D[0]}]
set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN U6} [get_ports {Q[7]}] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN R5} [get_ports {Q[6]}] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN U7} [get_ports {Q[5]}] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN R6} [get_ports {Q[4]}] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN R7} [get_ports {Q[3]}] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN U8} [get_ports {Q[2]}] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN T8} [get_ports {Q[1]}] set_property -dict {IOSTANDARD LVCMOS18 PACKAGE_PIN V9} [get_ports {Q[0]}]
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